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I-Shaped Developer
I-shapedSpecialist — deep expertise in Assembly
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The RISC-V Architectural Certification Tests (ACTs) are a set of assembly language tests designed to certify that a design faithfully implements the RISC-V specification.
Custom Verilator-compliant uvm library forked from ANTMICRO
APB UART verification example using a Verilator-compliant UVM testbench
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
I couldn't find any proper documentation for the VCS commands. So here are some of the commands that I've used along with their purpose.
Master programming by recreating your favorite technologies from scratch.
A graphical processor simulator and assembly editor for the RISC-V ISA
The Missing Semester of Your CS Education 📚
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